1. Field of the Invention
The present invention relates to a pattern forming method for forming a fine resist pattern and a method for manufacturing a semiconductor device.
2. Description of the Related Art
In recent years, with high integration of semiconductor devices, wires and isolation widths have become extremely small. Generally, the fine pattern formation process includes a step of forming a resist pattern on a substrate to be processed using photolithography techniques, and then a step of etching the substrate using the resist pattern as a mask. Thus, photolithography technology is important in the fine pattern formation process.
The dimensions of the resist pattern are limited by the exposure wavelength. On the other hand, in recent years, the dimensions of the fine pattern have been approaching the level of the exposure wavelength. Consequently, the formation of the resist pattern necessary for forming this type of fine pattern is becoming difficult.
So, as a method for forming a fine resist pattern which overcomes the limitation of wavelength, a shrink process is proposed (Japanese Patent No. 3071401, Japanese Patent No. 3189773, and Jpn. Pat. Appln. KOKAI Publication No. 2002-134379). The shrink process comprises forming a cross-linking material on the substrate to be processed and on the resist pattern, thereafter, causing a cross-linking reaction at an interface of the resist film and the resist pattern, thereby growing a cross-linking layer at the interface and forming a fine resist pattern which overcomes the limitation of wavelength and includes the resist pattern and the cross-linking layer.
In the method of the prior art, the resist pattern achieves some level of fineness. However, it is difficult to form the fine resist patterns that will be required in the future using this method of the prior art.